Computer Architecture Roadmap
Nine levels from building arithmetic out of logic gates to reading performance counters on a loaded multicore machine.
Level 1 · How arithmetic becomes hardware
Binary and two's complement, why floating point approximates, and the path from a truth table to an adder. By the end, arithmetic is no longer a primitive — it is something you could build.
Level 2 · What a CPU is made of
Registers, the ALU, the datapath they sit on and the control unit that steers it — plus the first myth to lose: that clock speed is performance.
Level 3 · The contract, and executing against it
The ISA as the interface between software and hardware, the distinction from microarchitecture that most performance arguments miss, and the fetch-decode-execute cycle that pipelining then overlaps.
Level 4 · Guessing, reordering and doing several things at once
A modern core is a throughput machine: it predicts branches, executes speculatively, runs instructions as their inputs arrive, and only commits in program order. This is where the line-by-line mental model dies.
Level 5 · The memory hierarchy
The deepest level, because this is where most real programs spend their time. Lines, locality, associativity, replacement, thrashing and prefetching — everything behind "why is this loop slow".
Level 6 · Past the cache, and where the bytes sit
DRAM organization, latency against bandwidth as two separate resources, and the layout decisions — alignment, padding, contiguity, AoS versus SoA — that decide how much of each fetched line you actually use.
Level 7 · Address translation and protection
The hardware half of virtual memory: the MMU on the path of every access, the TLB that makes it affordable, and the privilege and permission bits that process isolation is actually built from.
Level 8 · More than one core
Coherence keeping caches consistent, false sharing as its most expensive surprise, NUMA and affinity — then the ordering rules and atomic instructions that every lock and every lock-free structure is built on.
Level 9 · The rest of the machine, and reading it
Interrupts, DMA and the path to devices; GPUs and accelerators as throughput hardware with a transfer bill; the counters that tell you what the machine is doing; and where all of it shows up in code you already write.